IBM Unveils Dual-Architecture Mainframe Processor Integrating Arm ISA
IBM announced a 2-nanometer mainframe processor that natively executes both IBM Z and Arm instructions on the same cores to integrate AI and cloud-native software.
At the Hot Chips 2026 conference, IBM unveiled a first-of-its-kind dual-architecture mainframe processor designed for future Z and LinuxONE systems. The chip features 11 cores built on a 2-nanometer process node with base frequencies exceeding 5.7 GHz. Unlike traditional emulation or separate core types, the processor integrates the Arm Instruction Set Architecture directly into the mainframe cores, allowing them to switch between IBM Z and Arm instructions in nanoseconds via the open-source KVM hypervisor.
This design enables enterprises to run Arm-native Linux software and AI frameworks alongside mission-critical z/OS transaction workloads on the same silicon. The processor includes specialized accelerators for AI inference, I/O, compression, cryptography, and sorting, as well as up to 3.5 GB of virtual cache. IBM also previewed a next-generation Spyre AI accelerator to support large language models for agentic workflows.
The collaboration, established in April 2026, aims to provide mainframe customers access to Arm Holdings' ecosystem of 22 million developers without requiring software porting. This integration is intended to reduce infrastructure complexity for large enterprises, particularly in financial services, by combining cloud-native capabilities with IBM's security and reliability standards. The processor is expected to debut around 2028, likely as part of a future z18 family.
