Samsung Unveils BV-NAND and AI Memory Prototypes at FMS
Samsung Electronics introduced a 400-layer BV-NAND prototype and new vertical memory architectures to increase storage density and energy efficiency for AI workloads.
Samsung Electronics introduced its next-generation AI memory technology at the Future of Memory and Storage conference in Santa Clara, California. The company debuted the V10 Bonding V-NAND (BV-NAND) prototype, which employs a wafer-bonding architecture with over 400 layers. This design increases storage density by approximately 58% over the previous V9 NAND and improves read, write, and input/output performance.
As part of its AI memory strategy, the company also unveiled concept models for zHBM and zNAND-O architectures. These systems stack memory cells vertically above AI accelerators to minimize data travel distance and enhance energy efficiency. Samsung claims this wafer-bonding technology can reach ten times the memory density of conventional HBM5 memory and triple its energy efficiency.
These advancements are designed to address the growing demand for high-capacity NAND memory as AI workloads expand from initial model training to query generation.